;************************************************** ; Example 3 ;************************************************** ;demonstrates interface with communications port ;at 9600 baud ;written by Kenrick Chin ;version: 1.00 1997 Feb 28 ; 1.01 1998 Mar 10 ;************************************************** ; Hardware Constants ;************************************************** DATA EQU $0000 STACK EQU $00FF REGS EQU $1000 CODE EQU $F800 PORTA EQU $00 PIOC EQU $02 PORTC EQU $03 PORTB EQU $04 PORTCL EQU $05 DDRC EQU $07 PORTD EQU $08 DDRD EQU $09 PORTE EQU $0A PACTL EQU $26 BAUD EQU $2B SCCR1 EQU $2C SCCR2 EQU $2D SCSR EQU $2E SCDR EQU $2F ;portA PA7 EQU $80 DDRA7 EQU $80 ;portB PB7 EQU $80 PB6 EQU $40 PB5 EQU $20 PB4 EQU $10 PB3 EQU $08 PB2 EQU $04 PB1 EQU $02 PB0 EQU $01 ;LCD E EQU $04 RW EQU $02 RS EQU $01 ;SCSR TDRE EQU $80 TC EQU $40 RDRF EQU $20 SDA EQU $01 ;serial data available ;character constants BS EQU $08 LF EQU $0A CR EQU $0D SP EQU $20 DEL EQU $7F ;************************************************** ; Data segment ;************************************************** ORG DATA flags RMB 1 sbptr RMB 2 ;input serial buffer pointer (2 bytes) sbuf RMB 30 ;serial input buffer sbend RMB 1 ;************************************************** ; Code segment ;************************************************** ORG CODE rstrt JMP start ;************************************************** ; LCD 4-bit interface ;************************************************** ;initialize LCD LCDini LDA #$28 ;dual line, 4 bits BSR LCDir LDA #$06 ;increment mode BSR LCDir LDA #$0C ;cursor turned OFF BSR LCDir LDA #$10 ;move cursor right BSR LCDir LDA #$01 ;clear display BSR LCDir RTS ;LCD clear display LCDclr PSHA LDA #$01 BSR LCDir PULA RTS ;LCD home home PSHA LDA #$02 BSR LCDir PULA RTS ;LCD spaces ;enter with B = number of spaces ;Destroyed: A,B LCDsps LDA# SP LCDsp1 BSR LCDdr DECB BNE LCDsp1 RTS ;display at line #1 line1 PSHA LDA# $80 BSR LCDir PULA RTS ;display at line #2 and clear line line2 PSHA PSHB LDA# $C0 BSR LCDir LDB# 16 BSR LCDsps LDA# $C0 BSR LCDir PULB PULA RTS ;display at any position ;enter with A = LCD position (0-79) LCDpos PSHA CMPA #40 BLO LCDp1 ADDA #24 LCDp1 ORA #$80 BSR LCDir PULA RTS ;output to LCD instruction register ;Enter: A = 8 bits ;unchanged: A,B,X,Y LCDir PSHX PSHB PSHA PSHA LDX #REGS BSR LCDrdy ;wait for LCD ready BCLR PORTB,X RS ;set RS = 0 (PB0) BCLR PORTB,X RW ;set R/W = 0 (PB1) LDA #$3C ;set for output STA DDRD,X PULA TAB LSRA LSRA LSLB LSLB STA PORTD,X ;output MS 4 bits BSET PORTB,X E ;pulse E (PB2) BCLR PORTB,X E STB PORTD,X ;output LS 4 bits BSET PORTB,X E ;pulse E (PB2) BCLR PORTB,X E PULA PULB PULX RTS ;Output to LCD data register ;Enter with A = 8 bits ;unchanged: A,B,X,Y LCDdr PSHX PSHB PSHA PSHA LDX #REGS BSR LCDrdy ;wait for LCD ready BSET PORTB,X RS ;set RS = 1 (PB0) BCLR PORTB,X RW ;set R/W = 0 (PB1) LDA #$3C ;set for output STA DDRD,X PULA TAB LSRA LSRA LSLB LSLB STA PORTD,X ;output MS 4 bits BSET PORTB,X E ;pulse E (PB2) BCLR PORTB,X E STB PORTD,X ;output LS 4 bits BSET PORTB,X E ;pulse E (PB2) BCLR PORTB,X E PULA PULB PULX RTS ;wait for LCD ready ;expects X = REGS ;destroyed: A LCDrdy CLR DDRD,X ;set for input BSET PORTB,X RW ;set R/W = 1 (PB1) BCLR PORTB,X RS ;set RS = 0 (PB0) LCD1 BSET PORTB,X E ;pulse E (PB2) LDA PORTD,X BCLR PORTB,X E BSET PORTB,X E ;pulse E (PB2) BCLR PORTB,X E BITA #$20 ;test bit5 BNE LCD1 RTS ;LCD text display ;enter with Y = address of text ;return with Y = address of null char LCDtxt PSHA txt1 LDA 0,Y ;get char BEQ txt9 ;test for end char BSR LCDdr INY BRA txt1 txt9 PULA RTS ;************************************************** ; SCI Drivers ;************************************************** SCIini LDX #REGS LDA #$00 ;set for 8 bits STA SCCR1,X LDA #$2C ;enable TX, RX, RX interrupts STA SCCR2,X LDA #$30 ;set for 9600 baud STA BAUD,X LDD #sbuf ;set serial buffer pointer STD sbptr BCLR flags,SDA RTS ;SCI interrupt request handler SCIirq LDX #REGS ;set up I/O pointer BRCLR SCSR,X RDRF sbxt ;test for SCI RD LDA SCDR,X ;get character PSHX ;save X LDX sbptr ;get buffer pointer ANDA #$7F ;7 bits only CMPA #LF BEQ sbxt ;ignore line feed CMPA #BS BEQ backup CMPA #DEL BEQ backup CMPA #CR BEQ sbrdy ;CR received STA 0,X ;store character CMPX #sbend ;test for end BHS sbrdy INX STX sbptr ;bump pointer PULX ;restore X BSR putc ;echo character RTI backup CMPX #sbuf BEQ sbxt ;at start of buffer, do nothing DEX ;else backup STX sbptr PULX LDA #BS BSR putc LDA #SP BSR putc LDA #BS BSR putc RTI sbrdy CLR 0,X ;deposit a null BSET flags,SDA PULX BSR newln RTI sbxt PULX ;ignore this character RTI ;send one character ;enter with A = 8 bits ;unchanged: A,B,X,Y putc PSHX LDX #REGS putc1 BRCLR SCSR,X TDRE putc1 STA SCDR,X PULX RTS ;get one character ;return with A = 7 bits ;unchanged: B,X,Y getc PSHX LDX #REGS getc1 BRCLR SCSR,X RDRF getc1 ;wait for char LDA SCDR,X PULX RTS ;newline newln PSHA LDA #CR BSR putc LDA #LF BSR putc PULA RTS ;space space PSHA LDA #SP BSR putc PULA RTS ;print text ;enter with Y = address of text ;return with Y = address of null char print PSHA prt1 LDA 0,Y ;get char BEQ prt9 ;test for end char BSR putc INY BRA prt1 prt9 PULA RTS ;************************************************** ; Start of program ;************************************************** start LDS #STACK ;set up stack JSR LCDini ;initialize LCD JSR SCIini ;initialize SCI ;************************************************** ; Main program ;************************************************** LDY #&title ;point to title JSR LCDtxt ;output to LCD JSR line2 ;go to second line LDY #&mess ;point to message JSR LCDtxt ;output to LCD LDY #&mess1 ;send message to SCI BSR print main ;loop here forever BRCLR flags,SDA main BSR input BRA main ;input handler suboutine input BCLR flags,SDA ;clear done flag ***** process input here ***** LDD #sbuf ;reset serial buffer pointer STD sbptr RTS ;************************************************** ; Text strings ;************************************************** &title FCS 'Physics 4D6' &mess FCS 'Example 3' &mess1 FCC R FCC E FCC A FCC D FCC Y FCB $0D FCB $0A FCB $00 ;************************************************** ; Interrupt Handlers ;************************************************** tirq t1irq t2irq t3irq tc4irq tc1irq tc2irq tc3irq tc5irq PAIirq PAOirq SPIirq swi RTirq irq xirq resvd RTI ;************************************************** ; Interrupt Vectors ;************************************************** ORG $FFC0 FDB resvd ;reserved FDB resvd ;reserved FDB resvd ;reserved FDB resvd ;reserved FDB resvd ;reserved FDB resvd ;reserved FDB resvd ;reserved FDB resvd ;reserved FDB resvd ;reserved FDB resvd ;reserved FDB resvd ;reserved FDB SCIirq ;SCI irq FDB SPIirq ;SPI irq FDB PAIirq ;Pulse acc input edge irq FDB PAOirq ;Pulse acc overflow irq FDB tirq ;timer overflow FDB tc5irq ;timer output compare #5 interrupt FDB tc4irq ;timer output compare #4 interrupt FDB tc3irq ;timer output compare #3 interrupt FDB tc2irq ;timer output compare #2 interrupt FDB tc1irq ;timer output compare #1 interrupt FDB t3irq ;timer interrupt FDB t2irq ;timer interrupt FDB t1irq ;timer interrupt FDB RTirq ;real time interrupt FDB irq ;interrupt request FDB xirq ;X interrupt request FDB rstrt ;SWI interrupt FDB rstrt ;illegal opcode FDB rstrt ;COP failure FDB rstrt ;clock failure FDB rstrt ;cold reset END