HC11 I/O Register Table

Address

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Name

Description

$1000

PA7

 

 

 

 

 

 

PA0

PORTA

I/O Port A

$1001

 

 

 

 

 

 

 

 

 

reserved

$1002

STAF

STAI

CWOM

HNDS

OIN

PLS

EGA

INV

PIOC

Parallel I/O Control Register

$1003

PC7

 

 

 

 

 

 

PC0

PORTC

I/O Port C

$1004 

PB7

 

 

 

 

 

 

PB0

PORTB

Output Port B

$1005 

PC7

 

 

 

 

 

 

PC0

PORTCL

Alternate Latched Port C

$1006 

 

 

 

 

 

 

 

 

 

reserved

$1007 

Bit 7

 

 

 

 

 

 

Bit 0

DDRC

Data Direction for Port C

$1008 

 

 

Bit 5

 

 

 

 

Bit 0

PORTD

I/O Port D

$1009 

 

 

Bit 5

 

 

 

 

Bit 0

DDRD

Data Direction for Port D

$100A 

PE7

 

 

 

 

 

 

PE0

PORTE

Input Port E

$100B 

FOC1

FOC2

FOC3 

FOC4 

FOC5 

 

 

 

CFORC

Compare Force Register

$100C 

OC1M7

OC1M6

OC1M5

OC1M4

OC1M3 

 

 

 

OC1M

OC1 Action Mask Register

$100D 

OC1D7

OC1D6 

OC1D5 

OC1D4 

OC1D3 

 

 

 

OC1D

OC1 Action Data Register

$100E 

Bit 15

 

 

 

 

 

 

Bit 8

TCNT

Timer Counter Register

$100F 

Bit 7

 

 

 

 

 

 

Bit 0

 

 

$1010 

Bit 15

 

 

 

 

 

 

Bit 8

TIC1

Input Capture 1 Register

$1011 

Bit 7

 

 

 

 

 

 

Bit 0 

 

 

$1012 

Bit 15

 

 

 

 

 

 

Bit 8 

TIC2 

Input Capture 2 Register

$1013 

Bit 7

 

 

 

 

 

 

Bit 0 

   

$1014 

Bit 15

 

 

 

 

 

 

Bit 8 

TIC3

Input Capture 3 Register

$1015 

Bit 7 

 

 

 

 

 

 

Bit 0 

   

$1016 

Bit 15

 

 

 

 

 

 

Bit 8

TOC1 

Output Compare 1 Register

$1017 

Bit 7

 

 

 

 

 

 

Bit 0

   

$1018 

Bit 15

 

 

 

 

 

 

Bit 8

TOC2 

Output Compare 2 Register

$1019 

Bit 7

 

 

 

 

 

 

Bit 0 

 

 

$101A 

Bit 15

 

 

 

 

 

 

Bit 8 

TOC3 

Output Compare 3 Register

$101B 

Bit 7

 

 

 

 

 

 

Bit 0 

 

 

$101C 

Bit 15

 

 

 

 

 

 

Bit 8 

TOC4 

Output Compare 4 Register

$101D 

Bit 7 

 

 

 

 

 

 

Bit 0 

 

 

$101E 

Bit 15

 

 

 

 

 

 

Bit 8 

TOC5 

 Output Compare 5 Register

$101F 

Bit 7 

 

 

 

 

 

 

Bit 0 

 

 

$1020 

OM2

OL2

OM3

OL3

OM4

OL4

OM5

OL5

TCTL1

Timer Control Register 1 

$1021 

EDG4B

EDG4A

EDG1B

EGD1A

EDG2B

EDG2A

EDG3B

EDG3A

TCTL2

Timer Control Register 2 

$1022 

OC1I

OC2I

OC3I

OC4I

OC5I

IC1I

IC2I

IC3I

TMSK1 

Timer Interrupt Mask Reg 1

$1023 

OC1F

OC2F

OC3F

OC4F

OC5F

IC1F

IC2F

IC3F

TFLG1

Timer Interrupt Flag Reg 1

$1024 

TOI

RTII

PAOVI

PAII

 

 

PR1

PR0

TMSK2

Timer Interrupt Mask Reg 2

$1025 

TOF

RTIF

PAOVF

PAIF

 

 

 

 

TFLG2

Timer Interrupt Flag Reg 2

$1026 

DDRA7

PAEN

PAMOD

PEDGE

DDRA3

I4/O5

RTR1

RTR0

PACTL

Pulse Accumulator Control Register

$1027 

Bit 7

 

 

 

 

 

 

Bit 0

PACNT

Pulse Accumulator Count Reg

$1028 

SPIE

SPE

DWOM

MSTR

CPOL

CPHA

SPR1

SPR0

SPCR

SPI Control Register

$1029 

SPIF

WCOL

 

MODF

 

 

 

 

SPSR

SPI Status Register

$102A 

Bit 7

 

 

 

 

 

 

Bit 0

SPDR

SPI Data Register

$102B 

TCLR

 

SCP1

SCP0

RCKB

SCR2

SCR1

SCR0

BAUD

SCI Baud Rate Control

$102C 

R8

T8

 

M

WAKE

 

 

 

SCCR1

SCI Control Register 1

$102D 

TIE

TCIE

RIE

ILIE

TE

RE

RWU

SBK

SCCR2

SCI Control Register 2

$102E 

TDRE

TC

RDRF

IDLE

OR

NF

FE

 

SCSR

SCI Status Register

$102F 

Bit 7

 

 

 

 

 

 

Bit 0

SCDR

SCI Data Register

$1030 

CCF

 

SCAN

MULT

CD

CC

CB

CA

ADCTL

A/D Control Register

$1031 

Bit 7

 

 

 

 

 

 

Bit 0

ADR1

A/D Result Register 1

$1032 

Bit 7

 

 

 

 

 

 

Bit 0

ADR2

A/D Result Register 2

$1033 

Bit 7

 

 

 

 

 

 

Bit 0

ADR3

A/D Result Register 3

$1034 

Bit 7

 

 

 

 

 

 

Bit 0

ADR4

A/D Result Register 4

$1035 

 

 

 

 

 

 

 

 

 

reserved

$1036 

 

 

 

 

 

 

 

 

 

reserved

$1037 

 

 

 

 

 

 

 

 

 

reserved 

$1038 

 

 

 

 

 

 

 

 

 

reserved 

$1039 

ADPU

CSEL

IRQE

DLY

CME

 

CR1

CR0

OPTION

System Configuration Options

$103A 

Bit 7

 

 

 

 

 

 

Bit 0

COPRST

Arm/Reset COP Timer

$103B 

ODD

EVEN

 

BYTE

ROW

ERASE

EELAT

EEPGM

PPROG

EEPROM Programming Control Register

$103C 

RBOOT

SMOD

MDA

IRV

PSEL3

PSEL2

PSEL1

PSEL0

HPRIO

Highest Priority I-Bit Int and Misc

$103D 

RAM3

RAM2

RAM1

RAM0

REG3

REG2

REG1

REG0

INIT

RAM and I/O Mapping Reg

$103E 

TILOP

 

OCCR

CBYP

DISR

FCM

FCOP

TCON

TEST1 Factory TEST Control Reg

$103F 

EE3

EE2

EE1

EE0

 

NOCOP

 

EEON

CONFIG COP, ROM and EEPROM Enables