3.1 Comparators
Consider a difference amplifier with gain A. The effective input consists of a signal v(t) and a constant reference vr the output in principle satisfies
Consider a situation in which A=108, and the effective input at some instant is 1 µV. Then according to equation (1) an output of 100V is expected. Suppose however that the power supply connected to the amplifier is 5 V. Then all signals are constrained to lie between 0 and 5 V. For the case considered therefore equation (1) cannot be satisfied and the amplifier is said to be saturated, with its output at the maximum possible very near to that of the supply, 5 V. This will in fact be true whenever v(t)-vr$0.05 µV. If the input is less than the reference then the unconstrained amplifier would respond with a negative output. Again this is not possible because of the constraint imposed by the power supply and the output will clamp at or very near zero. Thus only for the extremely small effective input range of 0.05 µV does the amplifier behave linearly. Outside this range the output is confined to one of two levels. The linear range is given by the ratio of the power supply voltage to the gain. Consider for the moment the ideal situation of infinite gain. Then the output is high whenever the signal exceeds the reference and is otherwise low. From this point of view the comparator divides the domain of all real numbers, containing the input, into two sets: the true set with v > vr ,with high output and the complementary set with low output. The comparator is thus a hybrid circuit with a continuous or analogue input and a logical variable output. The comparator function can be summarized succinctly by introducing the sign (more properly signum) function sgn(y) which is defined to equal -1 for y < 0 and 1 for y > 0. The point y=0 is a transition point which is strictly speaking associated with a zero output, but in the ideal limit the output is discontinous here. Aside from this inconsequential nicety the ideal comparator logical output can be written
3.2 Schmitt Trigger
In describing the ideal (infinite gain) comparator it was also implicitly assumed that the input signal was
ideal. In fact any real signal consists of the sum of two components, the desired signal and a random signal referred
to as noise. The latter adds and subtracts from the desired signal (usually just referred to as the signal) and
can lead to multiple undesired crossings of the reference level when the signal is just above threshold ie v =
vr+d where d is comparable to the amplitude of
the fluctations due to noise. This results in a stuttering output with many erratic transitions between the two
output states.
A device which tends to overcome this problem is the Schmitt trigger. The arrangement consists of a comparator
with negative feedback to the reference. The latter now becomes
where ver is the externally applied reference, x is the logical variable and hence is 0 or 1, and
h is referred to as the hysteresis. 
The
action is indicated in the diagram. Assume the system has an input less than ver with the system initially
in the 0 state. If the input now increases to a value greater than the external reference the output will go high.
Because of the feedback this reduces the actual reference by h V. Thus in order for the output to return to the
original zero state the input must drop to or below ver-h. If h is made greater than the amplitude of
the noise fluctuations stuttering is eliminated.
3.3 Operational Amplifiers
An operational amplifier employs, like
the comparator, a very high gain difference amplifier. In the usual arrangement the non-inverting input is grounded
and there is a feedback loop to the inverting input as indicated in the diagram. Analysis of the circuit is obviated
in the ideal limit of infinite gain and amplifier impedance. The former ensures that the voltage at the inverting
terminal vanishes since its value is vout/A, where A is the open loop gain. The second ensures that
no current is drawn through the amplifier. The current thus flows entirely through the series arrangement of impedances.
The voltage drop across the impedance Zi is vi so the current is vi/Zi.
This same current flows through the feedback impedance so one arrives at an output voltage equal to the negative
of the product of the current and the feedback impedance or 
The operational amplifier may be used therefore to transform the input at will by the proper choice of feedback
and input impedances. It should be emphasized that the input impedance referred to here is external to the amplifier
and is not the amplifier input impedance which is taken as infinite.
3.4 Linear Gates
Linear gates are ideally electronic
switches controlled by a logic level. A linear input drives a device which provides an output reproducing as closely
as possible the input when the logic level is high. The gate is then enabled, or open. With a low logic level the
linear signal does not pass through to the output and the gate is then closed.
As indicated in the diagram there are two basic arrangements. The switch is conventionally closed with a high control signal. In the series arrangement shown in (a) the output takes on the high Z state like the tristate driver when the gate is not enabled. In the shunt arrangement shown in (b) however the output is ground when the gate is not enabled. Note that the switch control signal in this case is not enable. The output can be considered the product of the linear and gate inputs.
The models describing the linear gate
above also give some idea as to some of the departures from ideal operation. In the diagram the resistance represents
the source resistance. The open switch will exhibit capacitance and a closed switch will have some finite albeit
small resistance. Thus in the series gate the high frequency components will feed through the closed gate and there
will be an additional loss of signal across the switch resistance when the gate is open. Similarly for the shunt
gate high frequency components of the signal will be attenuated when the gate is open and a small signal will be
present across the switch resistance when it is closed.
What is not obvious from the model is that aspects of the control signal (gate) may also appear at the output. Thus in selecting a time segment of the input the gate will take the form of a rectangular pulse as indicated in the diagram. The output signal may in fact be superimposed on the square gate. The rectangular base of the output is referred to as a pedestal. Circuits are designed with balanced gates to minimize the pedestal. While reducing the pedestal enormously slight time shifts between the balanced gates results in spikes at the edges of the gate to appear at the output. Such artifacts as pedestals and spikes are designed to be as small as possible. The severity of the problem increases as the time scale decreases since in the short time domain, say submicrosecond, very fast risetime gates must be used and small delays are more significant.
3.5 Applications
In the accompanying diagram is shown
an analogue multiplexer employing a 3-phase time state generator and correspondingly three linear gates. With this
arrangement it is possible to transmit time segments of the three signals v1, v2, and v3
on a single line or channel. In this case the linear gates should be of the series type so that the closed gates
do not load the line.
Event selection, another common application,
is illustrated in the adjacent figure. An event is a phenomenum occurring in a well-defined region of space time
and results in a signal in the form of a pulse. In the illustration the input signal consists of 5 events associated
with different processes A and B. These could be, for example light flashes experienced by a photodetector. A gate
signal is generated whenever process B occurs. The linear gate output will consist of only those photodetector
pulses generated by B-type processes.
A third example is the operational amplifier
with gate selected feedback impedances. In the drawing the compact convention regarding the operational amplifier
is used. The grounded non-inverting input is implicit and it is assumed that the signal input is to the inverting
input, without explicit designation. Since the behaviour of the operational amplifier is determined by the ratio
of feedback to input impedance this arrangement allows the behaviour to be altered by gating. The linear gates
are assumed to be of the series type. The impedance network is often referred to as a filter. Thus the device shown
is a variable gate selected filter. If the gating arrangement is treated as a 3-bit word then words of weight greater
than one result in parallel feedback impedances so in principle 7 filter behaviours are possible. The word of weight
zero is excluded since this would result in no feedback. The gate word may be determined by external conditions
so that the filter may be considered to adapt.